SCHEDULE: NOV 16-22, 2013
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Exploring Parallelization Strategies at Undergraduate Level
SESSION: Unveiling Parallelization Strategies at Undergraduate Level
EVENT TYPE: HPC Interconnections, HPC Educator Program
TIME: 10:30AM - 12:00PM
SESSION CHAIR: Almadena Chtchelkanova
Presenter(s):Eduard Ayguade, Rosa Maria Badia, Vladimir Subotic
ROOM:702/704/706
ABSTRACT:
We are living the "real" parallel computing revolution. Something that was the concern of a "few" forefront scientists has become mainstream and of concern to every single programmer. This HPC Educator Session proposes a set of tools to be used at undergraduate level to analyze different parallelization strategies and their potential benefit. Tareador provides a very intuitive approach to visualize these strategies and understand their implications. The programmer needs to use simple code annotations to identify tasks and Tareador will dynamically build the computation task graph, identifying all data-dependencies among the annotated tasks. Tareador also feeds Dimemas, a simulator to predict the potential of the proposed strategy and visualize an execution timeline (Paraver). Using the environment, we show a top-down approach that leads to appropriate parallelization strategies (task decomposition and granularity) and that helps to identify tasks interactions that will need to be guaranteed when coding the application in parallel.
Chair/Presenter Details:
Almadena Chtchelkanova (Chair) - National Science Foundation
Eduard Ayguade - Universitat Politècnica de Catalunya
Rosa Maria Badia - Barcelona Supercomputing Center
Vladimir Subotic - Barcelona Supercomputing Center
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