SCHEDULE: NOV 16-22, 2013
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Performance Analysis of Hybrid BFS Approach Using Semi-External Memory
SESSION: Research Poster Reception
EVENT TYPE: Posters, Electronic Posters, and Education Posters
TIME: 5:15PM - 7:00PM
AUTHOR(S):Keita Iwabuchi, Hitoshi Sato, Yuichiro Yasui, Katsuki Fujisawa
ROOM:Mile High Pre-Function
ABSTRACT:
NVRAM devices can help processing of extremely large-scale graphs with
over DRAM capacity on a single node; however, performance studies and
access pattern analyses of graph kernels using both DRAM and NVRAM
devices are limited. In order to address the issue, we propose a graph
data offloading technique by using NVRAM for the hybrid BFS algorithm
and conduct performance analysis of the Hybrid BFS implementation with
our data offloading technique. Experimental results show that our
approach can achieve 2.8 GTEPS at the maximum and reduce half the size
of DRAM with 47.1% performance degradation. The poster also includes
performance analyses of our Hybrid BFS approach, which suggests that
we can process large-scale graphs with minimum performance degradation
using NVRAM by carefully considering the data structures and the
access patterns.
Chair/Author Details:
Keita Iwabuchi - Tokyo Institute of Technology, JST CREST
Hitoshi Sato - Tokyo Institute of Technology, JST CREST
Yuichiro Yasui - Chuo University, JST CREST
Katsuki Fujisawa - Chuo University, JST CREST
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